Impedance monitor performance tests

Author

Tomiyama, Kiyotaka ; Ihara, Susumu ; Piwko, R.J. ; Pratico, E.R. ; Crane, Laura

Author_Institution

Kansai Electr. Power Co. Inc., Hyogo

Volume

1

fYear

2002

fDate

2002

Firstpage

538

Abstract

An impedance monitor has been developed to determine the positive-sequence network impedance characteristics over a frequency range of 30 Hz to 400 Hz without disturbing the system. Its design incorporates (1) a 60 Hz cancellation filter based on a phase locked loop, (2) Clarke´s transformation and Park´s transformation, and (3) a transfer function approach for determination of the system impedance. This new approach to the system impedance measurement substantially improves the signal to noise ratio and reduces the effects of background noise. The paper presents the results of the performance tests conducted at a 77 kV SVC site in Japan and a 230 kV HVDC site in the USA.

Keywords

HVDC power convertors; HVDC power transmission; electric impedance measurement; monitoring; phase locked loops; power system measurement; static VAr compensators; transfer functions; 230 kV; 30 to 400 Hz; 77 kV; Clarke´s transformation; HVDC site; Japan; Park´s transformation; SVC site; USA; background noise effects reduction; cancellation filter; harmonic instability; impedance monitor performance tests; phase locked loop; positive-sequence network impedance; signal to noise ratio; transfer function approach; Background noise; Filters; Frequency; Impedance measurement; Monitoring; Phase locked loops; Signal to noise ratio; Static VAr compensators; Testing; Transfer functions;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Engineering Society Winter Meeting, 2002. IEEE

Print_ISBN

0-7803-7322-7

Type

conf

DOI

10.1109/PESW.2002.985061

Filename

985061