DocumentCode :
2269925
Title :
Real-time implementations of ordered-statistic CFAR
Author :
Bales, M.R. ; Benson, T. ; Dickerson, R. ; Campbell, D. ; Hersey, R. ; Culpepper, E.
Author_Institution :
Sensors & Electromagn. Applic. Lab., Georgia Tech Res. Inst., Atlanta, GA, USA
fYear :
2012
fDate :
7-11 May 2012
Abstract :
Ordered-statistic constant false alarm rate (OS-CFAR) detectors provide improved robustness over cell-averaging CFAR (CA-CFAR) detectors in multiple target and heterogeneous clutter environments. However, this benefit comes at the cost of generally increased processing time due to the need for a rank-ordering of the CFAR training data. Realtime implementations of OS-CFAR must consider this additional processing burden. In this paper, we present real-time FPGA and CPU/GPU implementations of OS-CFAR. A novel sorting architecture that scales linearly with window size is presented alongside traditional compare-and-swap and rank-only architectures in an FPGA. A rank-only GPU implementation is demonstrated alongside multi-threaded sorting and rank-only CPU implementations. Effects of training window size on throughput and power consumption are considered.
Keywords :
alarm systems; field programmable gate arrays; CFAR training data; cell-averaging CFAR detector; compare-and-swap; heterogeneous clutter environment; multi-threaded sorting; ordered-statistic CFAR; ordered-statistic constant false alarm rate detector; power consumption; rank-only CPU implementation; rank-only GPU implementation; rank-only architectures; rank-ordering; real-time FPGA; sorting architecture; window size; Arrays; Clocks; Field programmable gate arrays; Force; Graphics processing unit; Sorting; Training;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radar Conference (RADAR), 2012 IEEE
Conference_Location :
Atlanta, GA
ISSN :
1097-5659
Print_ISBN :
978-1-4673-0656-0
Type :
conf
DOI :
10.1109/RADAR.2012.6212264
Filename :
6212264
Link To Document :
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