DocumentCode
2270740
Title
Synthesis of low-power asynchronous circuits in a specified environment
Author
Nowich, S.M. ; Theobald, Michael
Author_Institution
Dept. of Comput. Sci., Columbia Univ., New York, NY, USA
fYear
1997
fDate
18-20 Aug. 1997
Firstpage
92
Lastpage
95
Abstract
We introduce a new method for the synthesis of power-optimal asynchronous control-circuits. The method includes two steps: (i) an exact algorithm for 2-level synthesis, and (ii) heuristic algorithms for multi-level synthesis. Unlike most existing synchronous algorithms, we incorporate both temporal dependence and glitch activity in our model to guide synthesis. Results, using only our 2-level minimization, show power reduction up to 33%.
Keywords
asynchronous circuits; logic design; algorithm; glitch activity; heuristic algorithm; low-power asynchronous control circuit; multi-level synthesis; power minimization; temporal dependence; two-level synthesis; Asynchronous circuits; Circuit synthesis; Clocks; Computer science; Energy consumption; Logic devices; Minimization; Optimal control; Permission; Power dissipation;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 1997. Proceedings., 1997 International Symposium on
Conference_Location
Monterey, CA, USA
Print_ISBN
0-89791-903-3
Type
conf
Filename
621248
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