• DocumentCode
    2271245
  • Title

    A massively parallel processing system based on a hyper-crossbar network

  • Author

    Chin, C. ; Lin, W.

  • Author_Institution
    General Electric Co., Schenectady, NY, USA
  • fYear
    1988
  • fDate
    10-12 Oct 1988
  • Firstpage
    463
  • Lastpage
    466
  • Abstract
    On the basis of VLSI and high-density interconnection technologies, a parallel-processing system consisting of 1024 processors is proposed. A special feature of this system is the reconfigurability of data communication channels between processors, achieved by using a hyper-crossbar interconnection network to facilitate the operation of multiple data systems. Each processor possesses two communication channels, separately connected to a local crossbar network and to a global crossbar network (which are subnetworks of the hyper-crossbar network) for local communication and global communication, respectively. Processors connected to the same local network form a processor cluster for the execution of systolic-array-type algorithms. Primarily implemented by Livermore interactive network communication (LINC) chips, the global networks are able to programmably hold or delay operation data to synchronize the data flow for generic applications. With the operation speed of 20 MHz, the system can reach a peak performance of 40 billion operations per second
  • Keywords
    CMOS integrated circuits; VLSI; multiprocessor interconnection networks; parallel architectures; 20 MHz; CMOS devices; Livermore interactive network communication; VLSI; communication channels; data communication channels; global communication; high-density interconnection technologies; hyper-crossbar network; local communication; local network; massively parallel processing system; multiple data systems; processor cluster; reconfigurability; systolic-array-type algorithms; Application software; Clocks; Computer displays; Multiprocessor interconnection networks; Parallel processing; Process control; Registers; Research and development; Switches; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Frontiers of Massively Parallel Computation, 1988. Proceedings., 2nd Symposium on the Frontiers of
  • Conference_Location
    Fairfax, VA
  • Print_ISBN
    0-8186-5892-4
  • Type

    conf

  • DOI
    10.1109/FMPC.1988.47401
  • Filename
    47401