Title :
A 2kb built-in row-controlled dynamic voltage scaling near-/sub-threshold FIFO memory for WBANs
Author :
Wei-Hung Du ; Po-Tsang Huang ; Ming-Hung Chang ; Wei Hwang
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
Due to the limited energy source, ultra-low power designs are significant approaches in energy-constrained SoCs. In this paper, a 2kb built-in row-controlled dynamic voltage scaling (DVS) FIFO memory is proposed to adopt the operation voltage in the near-/sub-threshold regions for the WBAN (wireless body area network) system. The row-based DVS provides the fine-grained power switch control for each sub-block. Therefore, the switching energy can be reduced, and the switching setup time can be eliminated. Moreover, only one sub-block are operated in the typical mode, and other sub-blocks are operated in the low-power mode and cut-off mode for realizing the power saving. Based on TSMC 65nm technology, the proposed DVS FIFO can achieve 47.8% power saving.
Keywords :
body area networks; integrated memory circuits; low-power electronics; power aware computing; DVS FIFO memory; WBAN; built-in row-controlled dynamic voltage scaling; energy-constrained SoC; fine-grained power switch control; limited energy source; sub-threshold FIFO memory; ultra-low power design; wireless body area network system; Discharges (electric); Layout; Power demand; Random access memory; Switches; Voltage control;
Conference_Titel :
VLSI Design, Automation, and Test (VLSI-DAT), 2012 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4577-2080-2
DOI :
10.1109/VLSI-DAT.2012.6212588
