Time-delay integration readout with adjacent pixel signal transfer for CMOS image sensor

This paper presents a time delay and integration (TDI) structure for CMOS image sensor (CIS) with adjacent pixel signal transfer (APST). The CCD-like TDI function is achieved in CIS by proposed APST without additional in-pixel device and minimum routing effort. The in-pixel integrated signal is transferred to adjacent pixel and summed up by an off-pixel column-shared unity-gain buffer. A 128×6 pixel array with 6×6μm² pixel size has been designed and fabricated in TSMC0.18μm 1P6M CIS technology providing 6 TDI stages with fill factor of 23.1%. It achieves a signal to noise ratio (SNR) improvement of 13dB, a transfer efficiency of 99.6%, and a total power dissipation of 4.43 μW per column at 1.6K fps.