Title :
Rapid performance estimation for system design
Author :
Narayan, Sanjiv ; Gajski, Daniel D.
Author_Institution :
Viewlogic Syst. Inc., Marlboro, MA, USA
Abstract :
The ability to gauge the effect of any design decision on system performance is important in the design process. Given a behavioral description and the functional-unit allocation, we describe a method for rapidly estimating the number of control steps required to implement the design. Extensions for pipelined functional units and multi-port memory accesses are also presented. Using flow-analysis, we then show how process execution times and related performance metrics can be computed to aid design space exploration
Keywords :
data flow analysis; performance evaluation; systems analysis; behavioral description; design decision; design space exploration; flow-analysis; functional-unit allocation; multi-port memory accesses; performance estimation; performance metrics; pipelined functional units; system design; Algorithm design and analysis; Clocks; Communication system control; Costs; Delay estimation; Partitioning algorithms; Processor scheduling; Propagation delay; Scheduling algorithm; State estimation;
Conference_Titel :
Design Automation Conference, 1996, with EURO-VHDL '96 and Exhibition, Proceedings EURO-DAC '96, European
Conference_Location :
Geneva
Print_ISBN :
0-8186-7573-X
DOI :
10.1109/EURDAC.1996.558206
