A practical clock router that accounts for the capacitance derived from parallel and cross segments

We propose a practical clock router that takes the capacitance caused by parallel and cross segments into account. In a conventional dock router that doesn´t consider this capacitance, clock skew calculated by SPICE after layout was 220-650 ps, which was 20-100 times greater than the reported skew of the router. In our router, skew in SPICE was reduced to 20-240 ps and only 2-4 times greater than our router´s report