Title :
Design and implementation of an optical OFDM baseband receiver in FPGA
Author :
Hwang, Yin-Tsung ; Tsai, Sung-Jun ; Chen, Yi-Yo
Author_Institution :
Nat. Chung Hsing Univ., Taichung, Taiwan
Abstract :
In this paper, a baseband receiver design and its FPGA implementation for an OOFDM system aimed at the NG-PON (passive optical network) applications are presented. A low cost IMDD (intensity modulation, direct detection) architecture is adopted and baseband DSP measures are employed to compensate various optical impairments. Targeting a 4GSps throughput rate, an 8-way parallel architecture is developed to perform the synchronization, FFT and equalization each with massive parallelism. A real valued FFT module taking advantage of the Hermitian spectrum is also developed to reduce the circuit complexity significantly. The simulation results show the proposed baseband receiver is capable of achieving an 8Gbps (effective) transmission bandwidth for 64-QAM coded OFDM symbols over a 25km long single mode fiber network. The uncoded BER reaches 10-3 when the received optical power is -16dBm. Due to the speed and resource limitation, the FPGA implementation obtains a fully functional but speed degraded system. The maximum working frequency is 250 MHz, which is one half of the 500MHz required for real time processing. The design occupies 21,423 logic slices and 56 embedded multiplier modules.
Keywords :
OFDM modulation; equalisers; field programmable gate arrays; optical receivers; passive optical networks; quadrature amplitude modulation; 64-QAM coded OFDM symbols; 8-way parallel architecture; FFT; FPGA; NG-PON application; OOFDM system; baseband receiver design; equalization; intensity modulation, direct detection architecture; low cost IMDD; optical OFDM baseband receiver; optical impairments; passive optical network; single mode fiber network; synchronization; Baseband; Field programmable gate arrays; OFDM; Optical fibers; Optical receivers; Passive optical networks;
Conference_Titel :
VLSI Design, Automation, and Test (VLSI-DAT), 2012 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4577-2080-2
DOI :
10.1109/VLSI-DAT.2012.6212653