A master-slave SoC structure for HMM based speech recognition

Author

Geng, Hui ; Shi, Yiyu ; Dong, Ming ; Liu, Runsheng

Author_Institution

Dept. of ECE, Missouri Univ. of Sci. & Technol., Rolla, MO, USA

fYear

2012

fDate

23-25 April 2012

Firstpage

1

Lastpage

4

Abstract

In this paper, we propose a master-slave SoC structure composed of an ARM7-TDMI and a co-processor for Mahalanobis distance calculation. The SoC was implemented on an Actel ProASIC series M7A3P1000 FPGA. Furthermore, we implement a HMM based speech recognition system based on this SoC. Compared with the conventional ASIC co-processor and slave SoC structure, the new master-slave structure reduces the number of SRAM access and improves the bus efficiency. Experiment results show that with 1.40s Chinese speech “feixi” and 24MHz clock, the processing time of the M-S SoC system is 1.85s, a 64.12% reduction compared with the software implement on ARM7-TDMI, and a 5.95% reduction compared with slave structure SoC.

Keywords

coprocessors; hidden Markov models; speech recognition; system-on-chip; ARM7-TDMI; Actel ProASIC series M7A3P1000 FPGA; HMM based speech recognition system; Mahalanobis distance calculation; SRAM access; bus efficiency; coprocessor; master-slave SoC structure; master-slave structure; Field programmable gate arrays; Master-slave; Random access memory; Speech; Speech recognition; System-on-a-chip; ARM7-TDMI; Master; SoC; speech recognition;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation, and Test (VLSI-DAT), 2012 International Symposium on

Conference_Location

Hsinchu

ISSN

PENDING

Print_ISBN

978-1-4577-2080-2

Type

conf

DOI

10.1109/VLSI-DAT.2012.6212657

Filename

6212657