DocumentCode :
2272711
Title :
A highly integrated class-D amplifier using driver delay hysteresis control
Author :
Tai, Jia-Nan ; Chen, Hsin-Shu ; Chiu, Hang-Quei
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2012
fDate :
23-25 April 2012
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, a closed-loop class-D amplifier (CDA) simplifying circuit implementation on conventional hysteresis control is proposed. The functionality of hysteresis control is realized by comparator in conjunction with MOSFET propagation delay. The switching frequency variation is reduced by means of unmatched rising and falling edge delays. The prototype CDA chip is fabricated in 0.35-μm CMOS process and its active area is 0.2 mm2. The measurement results show that THD+N ratio is flat between 20 Hz and 20 kHz with all values below 0.03%. PSRR and SNR are 64 dB and 80 dB, respectively.
Keywords :
CMOS integrated circuits; MOSFET; amplifiers; closed loop systems; delays; hysteresis; CMOS process; MOSFET propagation delay; closed-loop class-D amplifier; driver delay hysteresis control; frequency 20 Hz to 20 kHz; size 0.35 mum; switching frequency variation; Delay; Hysteresis; Logic gates; Pulse width modulation; Switches; Switching frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation, and Test (VLSI-DAT), 2012 International Symposium on
Conference_Location :
Hsinchu
ISSN :
PENDING
Print_ISBN :
978-1-4577-2080-2
Type :
conf
DOI :
10.1109/VLSI-DAT.2012.6212661
Filename :
6212661
Link To Document :
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