DocumentCode :
2272883
Title :
Improving the CAD of SRD frequency multipliers
Author :
Zhang, J. ; Raisanen, A.V.
Author_Institution :
Radio Lab., Helsinki Univ. of Technol., Espoo, Finland
Volume :
3
fYear :
1996
fDate :
17-21 June 1996
Firstpage :
1767
Abstract :
A method for improving the efficiency of CAD of step recovery diode (SRD) frequency multipliers is proposed. By abating the nonlinearity of the model of the diode to an appropriate extent, the simulation and optimization of SRD frequency multipliers can be carried out faster and easier. Simulation results are compared with experimental results.
Keywords :
charge storage diodes; circuit CAD; circuit analysis computing; circuit optimisation; frequency multipliers; microstrip circuits; microwave diodes; microwave frequency convertors; nonlinear network synthesis; CAD; SRD frequency multipliers; optimization; simulation; step recovery diode; Capacitance; Circuit simulation; Diodes; Harmonic analysis; Impedance; Microwave Theory and Techniques Society; Nonlinear circuits; Radio frequency; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Symposium Digest, 1996., IEEE MTT-S International
Conference_Location :
San Francisco, CA, USA
ISSN :
0149-645X
Print_ISBN :
0-7803-3246-6
Type :
conf
DOI :
10.1109/MWSYM.1996.512285
Filename :
512285
Link To Document :
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