A VHDL reuse workbench

An increasing productivity gap affects the progress of electronic system design. As an immediately available solution, the application of reuse techniques is widely recognized. This paper presents a reuse workbench for VHDL designs which covers the three basic requirements of a design with reuse process: availability, findability, and understandability. The latter is realized by a novel reverse engineering concept for VHDL designs. It is based on the intensive use of hypertext techniques and graphical code representations