DocumentCode :
2273619
Title :
Session 3: Modelling
Author :
Hara-Azumi, Yuko
Author_Institution :
Ritsumeikan University
fYear :
2011
fDate :
5-6 June 2011
Firstpage :
1
Lastpage :
1
Abstract :
This session focuses on various modeling formalisms, and usage of these formalisms for ESL modeling. For example, AADL is becoming standard in certain domains such as avionics, and IP-Xact is becoming standard for interoperability of IPs developed by independent vendors. Polychronous formalisms are being increasing used for concurrent embedded software system modeling. These three papers show certain advantages, and methodologies based in these formalisms. The first paper describes a transformation from AADL to Signal. This transformation allows for a direct formal validation of an AADL specification via the Sigali model-checker and the Polychrony environment. The second paper describes a collection of tools designed for other purposes (documentation, simulation) to try to extract sufficient information from models coded in SystemC so that an IP-Xact epresentation of these models could be assembled. The third paper announces a formally-based compilation framework, from specification parallelism to implementation parallelism. It relies on notions of weak-endochrony defined in the framework of synchronous reactive languages. In particular, it considers the generation of executable code involving multiple threads.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic System Level Synthesis Conference (ESLsyn), 2011
Conference_Location :
San Diego, CA, USA
Print_ISBN :
978-1-4577-0634-9
Electronic_ISBN :
978-1-4577-0632-5
Type :
conf
DOI :
10.1109/ESLsyn.2011.5952284
Filename :
5952284
Link To Document :
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