DocumentCode :
2273694
Title :
Hardware/software partitioning of VHDL system specifications
Author :
Eles, Petru ; Peng, Zebo ; Kuchcinski, Krzysztof ; Doboli, Alexa
Author_Institution :
Dept. of Comput. & Inf. Sci., Linkoping Univ., Sweden
fYear :
1996
fDate :
16-20 Sep 1996
Firstpage :
434
Lastpage :
439
Abstract :
This paper presents an approach far system level specification and hardware/software partitioning with VHDL. The implications of using VHDL as a specification language are discussed and a message passing mechanism is proposed for process interaction. We define the metric values for partitioning and develop a cost function that guides our heuristics towards performance optimization under hardware and software cost constraints. Experimental results are presented
Keywords :
circuit layout CAD; hardware description languages; high level synthesis; message passing; simulated annealing; systems analysis; VHDL system specifications; cost function; hardware/software partitioning; message passing mechanism; metric values; partitioning; performance optimization; process interaction; specification language; system level specification; Communication system software; Coprocessors; Costs; Hardware; High level synthesis; Microprocessors; Partitioning algorithms; Signal synthesis; Simulated annealing; Specification languages;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1996, with EURO-VHDL '96 and Exhibition, Proceedings EURO-DAC '96, European
Conference_Location :
Geneva
Print_ISBN :
0-8186-7573-X
Type :
conf
DOI :
10.1109/EURDAC.1996.558240
Filename :
558240
Link To Document :
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