Design of a 32nm Independently-Double-Gated FlexFET SOI Transistor

Considerable recent research has focused on developing vertical FinFET-type double-gated CMOS devices. Planar independently-double-gated FlexFET CMOS transistors have recently been reported, exhibiting strong dynamic threshold voltage control. The FlexFET device design utilizes a mid-gap metal top gate self-aligned to an implanted JFET bottom gate. A simple analytical dynamic threshold model is developed in this work and verified by extensive device simulation. Optimization of the top gate oxide thickness, silicon thickness, and gate work functions for a 32 nm node FlexFET CMOS technology is achieved by device simulation using SILVACO. Ideal dynamic threshold control of this 32 nm device is achieved with relatively thick llnm silicon and 4 nm gate oxide thicknesses.