Title :
The performance and performance methodology for a PowerPC SMP system
Author :
Olszewski, B.R. ; Guillemaud, J.-J.
Author_Institution :
RISC Syst./6000 Div., IBM Corp., USA
Abstract :
The first PowerPC-based SMP jointly developed by IBM and Croup Bull, had aggressive performance goals for its intended market of commercial applications. This paper describes the hardware and software design processes used in the product development, as well as performance results obtained on the first-generation PowerPC 601-based hardware.
Keywords :
multiprocessing systems; performance evaluation; Croup Bull; IBM; PowerPC SMP system; aggressive performance goals; hardware; performance methodology; software design processes; Application software; Hardware; Mathematical model; Microprocessors; Operating systems; Power system modeling; Product development; Reduced instruction set computing; Software design; Software performance;
Conference_Titel :
Compcon '95.'Technologies for the Information Superhighway', Digest of Papers.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-7029-0
DOI :
10.1109/CMPCON.1995.512373
