Title :
New generations of tools sets that enable FDSOI and 3-D tri-gate technologies
Author :
Arghavani, Reza ; Deshmukh, Shashank ; Hemker, David ; Kamarthy, Gowri ; Marks, Jeff ; Vahedi, Vahid
Author_Institution :
Lam Res. Corp., Fremont, CA, USA
Abstract :
Today no insurmountable obstacles are foreseen inhibiting scaling logic devices to the 10nm node. Cost effective processes and equipment sets have been developed that allow both 3-D Tri-Gate and Ultra-Thin Body SOI integration schemes to be scaled. This allows the equipment industry to focus on innovations of new material and their integration into cost effective tool sets in time for high volume manufacturing in sub 10nm node technology. In this paper we review various process challenges the equipment industry overcame to enable the 3-D Tri-Gate and Ultra-Thin Body SOI architecture in partnership with integrated device manufactures.
Keywords :
logic devices; silicon-on-insulator; 3D trigate technology; FDSOI; Si; cost effective process; equipment industry; integrated device manufacture; logic device; size 10 nm; ultrathin body SOI integration scheme; Abstracts; Lithography; MOS devices; Sensitivity; Strontium; Tin;
Conference_Titel :
Junction Technology (IWJT), 2012 12th International Workshop on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4673-1258-5
Electronic_ISBN :
978-1-4673-1256-1
DOI :
10.1109/IWJT.2012.6212808
