• DocumentCode
    2274822
  • Title

    Avoiding irreducible CSC conflicts by internal communication

  • Author

    Schaefer, Mark ; Vogler, Walter ; Wist, Dominic ; Wollowski, Ralf

  • Author_Institution
    Inst. of Comput. Sci., Univ. of Augsburg, Augsburg
  • fYear
    2008
  • fDate
    23-27 June 2008
  • Firstpage
    3
  • Lastpage
    12
  • Abstract
    Resynthesis of handshake specifications obtained e.g. from BALSA or TANGRAM with speed-independent logic synthesis from STGs is a promising approach. To deal with state-space-explosion, we suggested STG decomposition; a problem is that decomposition can lead to irreducible CSC conflicts. Here, we present a new approach to solve such conflicts by introducing internal communication between the components. We give some first, very encouraging results for very large STGs concerning synthesis time and circuit area.
  • Keywords
    Petri nets; asynchronous circuits; logic design; state-space methods; STG decomposition; asynchronous circuit; handshake specification; internal communication; irreducible CSC conflict; speed-independent logic synthesis; state-space-explosion; Asynchronous circuits; Circuit synthesis; Computer science; Control system synthesis; Design automation; Digital circuits; Hardware design languages; Logic circuits; Logic programming; Petri nets; CSC; STG; asynchronous; decomposition; resynthesis; state-space-explosion;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application of Concurrency to System Design, 2008. ACSD 2008. 8th International Conference on
  • Conference_Location
    Xian
  • ISSN
    1550-4808
  • Print_ISBN
    978-1-4244-1838-1
  • Electronic_ISBN
    1550-4808
  • Type

    conf

  • DOI
    10.1109/ACSD.2008.4574588
  • Filename
    4574588