• DocumentCode
    2275020
  • Title

    A new PowerPC microprocessor for low power computing systems

  • Author

    Ogden, D. ; Kuttanna, B. ; Loper, A.J. ; Mallick, S. ; Putrino, M.

  • Author_Institution
    IBM Corp., Austin, TX, USA
  • fYear
    1995
  • fDate
    5-9 March 1995
  • Firstpage
    281
  • Lastpage
    284
  • Abstract
    A new PowerPC microprocessor is designed for desktop companions and high end embedded multimedia applications such as high performance video games with graphics intensive operations. It features a low power consumption of 1.2 watts at 66 MHz at 3.3 volts. The processor is fabricated in a 0.5 micron, 4 level metal CMOS technology resulting in 1 M transistors in a 7.07 mm by 7.07 mm chip size. Dual 4K-byte instruction and data caches coupled to a high performance 64-bit multiplexed bus and separate execution units (branch, float, integer, and load-store units) result in a peak instruction rate of 2 instructions per clock cycle. Low power techniques are used throughout the entire design including dynamically powered down execution units.
  • Keywords
    CMOS integrated circuits; microprocessor chips; 0.5 micron; 1.2 W; 66 MHz; CMOS technology; PowerPC microprocessor; data caches; desktop companions; graphics intensive operations; high end embedded multimedia applications; low power computing systems; low power consumption; video games; CMOS process; CMOS technology; Clocks; Decoding; Energy consumption; Games; Graphics; Microprocessors; Registers; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compcon '95.'Technologies for the Information Superhighway', Digest of Papers.
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    1063-6390
  • Print_ISBN
    0-8186-7029-0
  • Type

    conf

  • DOI
    10.1109/CMPCON.1995.512397
  • Filename
    512397