DocumentCode :
2275035
Title :
The Design of RPM: An FPGA-based Multiprocessor Emulator
Author :
Öner, Koray ; Barroso, Luiz A. ; Iman, Sasan ; Jeong, Jaeheon ; Ramamurthy, Krishnan ; Dubois, Michel
Author_Institution :
University of Southern California, Los Angeles, CA
fYear :
1995
fDate :
1995
Firstpage :
60
Lastpage :
66
Abstract :
Recent advances in Field-Programmable Gate Arrays (FPGA) and programmable interconnects have made it possible to build efficient hardware emulation engines. In addition, improvements in Computer-Aided Design (CAD) tools, mainly in synthesis tools, greatly simplify the design of large circuits. The RPM (Rapid Prototype Engine for Multiprocessors) Project leverages these two technological advances. Its goal is to develop a common hardware platform for the emulation of multiprocessor systems with different architectures. For cost reasons, the use of FPGAs in RPM is limited to the memory controllers, while the rest of the emulator, including the processors, memories and interconnect, is built with off-the-shelf components. A flexible non-intrusive event logging mechanism is included at all levels of the memory hierarchy, making it possible to monitor the emulation in very fine detail. This paper presents the hardware design of RPM.
Keywords :
Field-Programmable Gate Arrays (FPGAs); logic emulation; message-passing multicomputers; rapid prototyping; shared-memory multiprocessors; Circuit synthesis; Costs; Design automation; Emulation; Engines; Field programmable gate arrays; Hardware; Integrated circuit interconnections; Multiprocessing systems; Prototypes; Field-Programmable Gate Arrays (FPGAs); logic emulation; message-passing multicomputers; rapid prototyping; shared-memory multiprocessors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Gate Arrays, 1995. FPGA '95. Proceedings of the Third International ACM Symposium on
Print_ISBN :
0-7695-2550-4
Type :
conf
DOI :
10.1109/FPGA.1995.241946
Filename :
1377262
Link To Document :
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