DocumentCode :
2275087
Title :
Numerical simulation of static and dynamic operation performance of SOI VLT LDMOS considering electrical-thermal couple effects
Author :
Jun Huang ; Tingting Hua ; YuFeng Guo ; Yue Xu ; Xiaojuan Xia ; Ying Zhang ; Sheu, G.
Author_Institution :
Sch. of Electron. Sci. & Eng., Nanjing Univ. of Posts & Telecommun., Nanjing, China
fYear :
2012
fDate :
14-15 May 2012
Firstpage :
156
Lastpage :
159
Abstract :
Varied Lateral Thickness (VLT) technology is a novel voltage-sustaining technology which has been developed recently. This paper focuses on the static and dynamic operation performance of SOI LDMOS using the VLT technology. Firstly, the VLT LDMOS is optimized by using the TCAD tool to maximize the off-state breakdown voltage. The results show that the drift doping concentration and the breakdown voltage of the VLT device increase by 59.2% and 11.8% compared with the conventional REduce SURface Field (RESURF) LDMOS, respectively. Secondly, the static I-V characteristic and the dynamic I-V characteristic of the both devices are investigated in detail. The carrier mobility and the impact ionization are analyzed to explore the physical mechanism of the electro-thermal couple effects under the continual and pulse biased voltages. The results show that the VLT LDMOS has higher breakdown voltage, larger operating current and improved static/dynamic Safe Operating Area (SOA).
Keywords :
MOSFET; numerical analysis; semiconductor device breakdown; silicon-on-insulator; technology CAD (electronics); SOI LDMOS; SOI VLT LDMOS; Si; TCAD tool; carrier mobility; dynamic I-V characteristic; electrical-thermal couple effects; electro-thermal couple effects; impact ionization; numerical simulation; off-state breakdown voltage; reduce surface field LDMOS; static I-V characteristic; static/dynamic safe operating area; varied lateral thickness technology; voltage-sustaining technology; Abstracts; Breakdown voltage; Electric breakdown; Junctions; Performance evaluation; Reliability; Semiconductor optical amplifiers; LDMOS; SOA; SOI; VLT; breakdown voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Junction Technology (IWJT), 2012 12th International Workshop on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4673-1258-5
Electronic_ISBN :
978-1-4673-1256-1
Type :
conf
DOI :
10.1109/IWJT.2012.6212832
Filename :
6212832
Link To Document :
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