DocumentCode
2275619
Title
Sizing of MOS transistors for amplifier design
Author
Pinto, R. L Oliveirn ; Schneider, M.C. ; Montoro, C.G.
Author_Institution
Univ. Fed. de Santa Catarina, Florianapolis, Brazil
Volume
4
fYear
2000
fDate
2000
Firstpage
185
Abstract
This paper presents a design procedure for amplifiers based on a universal model of the MOSFET, valid from weak to strong inversion. A set of very simple expressions allows quick design by hand as well as an evaluation of the design in terms of power consumption and silicon real estate. It is shown that there is an optimum bias in moderate inversion for which the attainable DC gain is maximum. The design and measurements of a common-source amplifier illustrate the appropriateness of the proposed methodology
Keywords
CMOS analogue integrated circuits; MOSFET; amplifiers; capacitance; integrated circuit design; semiconductor device models; MOS transistor sizing; MOSFET universal model; amplifier design; common-source amplifier; design procedure; maximum DC gain; optimum bias; power consumption; silicon real estate; Analog circuits; Differential amplifiers; Electronic mail; Energy consumption; Equations; Frequency; MOSFET circuits; Operational amplifiers; Silicon; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location
Geneva
Print_ISBN
0-7803-5482-6
Type
conf
DOI
10.1109/ISCAS.2000.858719
Filename
858719
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