DocumentCode :
2275748
Title :
The EPAC Architecture: An Expert Cell Approach to Field Programmable Analog Devices
Author :
Klein, Hans W.
Author_Institution :
IMP, Inc., San Jose, CA
fYear :
1996
fDate :
1996
Firstpage :
94
Lastpage :
98
Abstract :
This paper describes the architectural configuration of the Electrically Programmable Analog Circuit (EPAC™), an expert cell approach to meeting the market need for an analog counterpart to the digital FPGA. It provides an overview of the technology and describes the internal operation of the first commercial EPAC devices.
Keywords :
Analog circuits; CMOS process; CMOS technology; Chromium; EPROM; Field programmable gate arrays; Functional programming; Integrated circuit interconnections; Prototypes; Random access memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Gate Arrays, 1996. FPGA '96. Proceedings of the 1996 ACM Fourth International Symposium on
Print_ISBN :
0-7695-2576-8
Type :
conf
DOI :
10.1109/FPGA.1996.242435
Filename :
1377292
Link To Document :
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