Title :
A scalable scheduling algorithm to avoid conflicts in switch-memory-switch routers
Author :
Xu, Yang ; Wu, Beibei ; Li, Wenjie ; Liu, Bin
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Abstract :
Although output queued (OQ) switches are prominent for their high performance, they are not easy to implement due to the high speedup requirement. Using a special scheduling algorithm in the first stage switch, a more scalable switch-memory-switch (SMS) architecture can emulate an OQ switch, where cells must be transferred from the inputs to the shared memories per time slot without arrival and departure conflicts. Although scheduling algorithm achieves good performance, the time complexity for constructing the bipartite graph is too high to be used in practice. In this paper, we propose a new iterative random round-Robin matching (iRRM) algorithm together with its constrained version CiRRM, where no bipartite graph is required to be constructed in advance to solve the departure conflict, and thus high computation overhead is avoided. In our algorithms, both the arrival and the departure conflicts are melted in the iterations. Each iterations consist of two steps: request step and grant step, where randomness and more easily implemented round-robin principle are used respectively. Through theoretical analysis, we obtain that with M=2φ(N-1) shared memories, where N is the port number and φ is a constant larger than (2N-1)/(2N-2), iRRM/CiRRM can complete a matching within O(logM) iterations with high probability in M and the time complexity of CiRRM is only O(log2M/loglogM), which is much lower than prior algorithms.
Keywords :
computational complexity; iterative methods; memory architecture; probability; queueing theory; scheduling; telecommunication network routing; telecommunication switching; CiRRM; SMS; arrival conflict; constrained version; departure conflict; iRRM; iterative random round-Robin matching algorithm; probability; scalable scheduling algorithm; shared memory; switch-memory-switch router; time complexity; Algorithm design and analysis; Bipartite graph; Computer science; Delay; Fabrics; Iterative algorithms; Quality of service; Round robin; Scheduling algorithm; Switches;
Conference_Titel :
Computer Communications and Networks, 2005. ICCCN 2005. Proceedings. 14th International Conference on
Print_ISBN :
0-7803-9428-3
DOI :
10.1109/ICCCN.2005.1523809