A fuzzy-logic controller with on-chip learning, employing stochastic logic

There is an increasing interest in the development of efficient fuzzy controller hardware, able to cope with the requirements of real-time systems. Several fuzzy-logic chips have been proposed using both analog and digital techniques. This paper presents a hardware implementation of a digital fuzzy controller that uses stochastic logic to implement the arithmetic functions involved in the defuzzification and learning processes. Stochastic logic systems use binary random signals whose average can be viewed as an analog value in the range [0,1]. Using stochastic logic has a number of advantages over other analog and digital implementations, such as multiplication using a simple AND gate. Stochastic logic has been successfully applied to different fields including neural processing. A proper selection of the different parts of the controller and the use of stochastic logic leads to a simple digital architecture with a short response time (less than 21 μs for a 7 bit stochastic precision and a 12 MHz system clock). A feature of the proposed controller is its learning capability, obtained by adjusting the position of the output singletons. Presently, a prototype of the controller is being designed using a 1.5 μm CMOS technology