Analysis of the switching process of power MOSFETs using a new analytical losses model

The piecewise linear model has traditionally been used to calculate switching losses in switching mode power supplies due to its simplicity and good performance. However, the use of the latest low voltage power MOSFET generations and the continuously increasing range of switching frequencies has made it necessary to review this model to account for the parasitic inductances that it does not include. This paper presents a complete analytical switching loss model for power MOSFETs in low voltage switching converters that includes the most relevant parasitics. It clarifies the switching process, providing information about how these parasitics, especially inductances, determine switching losses and hence the final converter efficiency. The analysis presented in this paper yields two different types of possible switching situations: capacitance-limited switching and inductance-limited switching. This paper shows that, while the piecewise linear model may be applied in the former, the proposed model is more accurate for the latter. Carefully-obtained experimental results, described in detail, support the analytical results presented.