DocumentCode :
2278364
Title :
Gate tunnelling and impact ionisation in sub 100 nm PHEMTs
Author :
Kalna, Karol ; Asenov, Asen
Author_Institution :
Dept. of Electron. & Electr. Eng., Glasgow Univ., UK
fYear :
2002
fDate :
2002
Firstpage :
139
Lastpage :
142
Abstract :
Impact ionization and thermionic tunnelling as two possible breakdown mechanisms in scaled pseudomorphic high electron mobility transistors (PHEMTs) are investigated by Monte Carlo (MC) device simulations. Impact ionization is included in MC simulation as an additional scattering mechanism whereas thermionic tunnelling is treated in the WKB approximation during each time step in selfconsistent MC simulation. Thermionic tunnelling starts at very low drain voltages but then quickly saturates. Therefore, it should not drastically affect the performance of scaled devices. Impact ionization threshold occurs at greater drain voltages which should assure a reasonable operation voltage scale for all scaled PHEMTs.
Keywords :
Monte Carlo methods; WKB calculations; high electron mobility transistors; impact ionisation; semiconductor device models; tunnelling; 100 nm; Monte Carlo device simulations; WKB approximation; additional scattering mechanism; gate tunnelling; impact ionisation; pseudomorphic high electron mobility transistors; sub 100 nm PHEMTs; thermionic tunnelling; very low drain voltages; Electric breakdown; Electron mobility; HEMTs; Impact ionization; MODFETs; Monte Carlo methods; PHEMTs; Scattering; Threshold voltage; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 2002. SISPAD 2002. International Conference on
Print_ISBN :
4-89114-027-5
Type :
conf
DOI :
10.1109/SISPAD.2002.1034536
Filename :
1034536
Link To Document :
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