DocumentCode
2278398
Title
Low insertion loss Ka-band SPST switch using S-GCPW designs
Author
Cho, Kuan-Liang ; Chiu, Hsien-Chin ; Tu, Yen-Chang ; Wu, Chia-Sung
Author_Institution
Dept. of Electron. Eng., Chang Gung Univ., Taoyuan, Taiwan
fYear
2012
fDate
10-11 May 2012
Firstpage
1
Lastpage
3
Abstract
This paper presented 28 GHz single-pole-single-throw switch using a 0.18 μm CMOS process. The CMOS transistors are designed to have a high substrate resistance to minimize the insertion loss and improve power handling capability. The SPST switch has insertion loss of -7.2 dB and isolation is greater than-29 dB at 24 GHz.
Keywords
CMOS integrated circuits; microwave switches; CMOS process; CMOS transistors; S-GCPW designs; frequency 24 GHz; frequency 28 GHz; loss -7.2 dB; low insertion loss Ka-band SPST switch; power handling capability; single-pole-single-throw switch; size 0.18 mum; substrate resistance; CMOS integrated circuits; Insertion loss; Loss measurement; Semiconductor device measurement; Switching circuits; Transistors; Transmission line measurements; CMOS switch; SPST; microwave switch;
fLanguage
English
Publisher
ieee
Conference_Titel
High Speed Intelligent Communication Forum (HSIC), 2012 4th International
Conference_Location
Nanjing, Jiangsu
Print_ISBN
978-1-4673-0678-2
Electronic_ISBN
978-1-4673-0676-8
Type
conf
DOI
10.1109/HSIC.2012.6213002
Filename
6213002
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