DocumentCode
2278446
Title
Evaluating fine-pitch chip-on-flex with non-conductive film by using multi-points compliant bump structure
Author
Huang, Yu-Wei ; Lu, Su-Tsai ; Chen, Tai-Hong
Author_Institution
Dept. of Assembly & Reliability Technol., Ind. Technol. Res. Inst.
fYear
2006
fDate
6-8 Dec. 2006
Firstpage
324
Lastpage
329
Abstract
High density packaging increasingly dominates the market share in LCD highlighting the need not only to decrease the pitch of bonding joints, but also to increase the I/O numbers of driver IC for high-end display applications. However, the shortage between two adjacent electrodes is a major problem when using conventional packaging technologies. Non-conductive film (NCF) is one of the interconnection materials which are increasingly used in LCD package and flip chip technology. There are many advantages using NCF in package, such as low cost, simplified process, and low temperature process. On the contrary, NCF bonded faces a challenge of yield. In this paper, we have developed a multi-points compliant bump (MPCB) using in NCF-bonded chip-on-flex (COF) process. Evaluating the effect of temperature, time, and load on electric resistance and peeling strength. A higher peeling strength is obtained at higher bonding load, temperature, and time. This indicated that the NCF with high curing degree is sufficient to hold the interconnection joints. The changes in daisy chain after 85degC/85%RH thermal humidity storage test (THST) for 500 hrs are measured. Due to MPCB deforms in bonding process, and releases counterforce in reliability test. Experimental results show that low bonding load, high bonding temperature and high bonding time is good for reliability.
Keywords
chip scale packaging; flip-chip devices; integrated circuit reliability; liquid crystal displays; 500 hrs; LCD package; THST; chip on flex; fine pitch; flip chip technology; high density packaging; multi points compliant bump; nonconductive film; reliability test; thermal humidity storage test; Application specific integrated circuits; Bonding; Costs; Electric resistance; Electrodes; Flip chip; Integrated circuit packaging; Liquid crystal displays; Temperature; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference, 2006. EPTC '06. 8th
Conference_Location
Singapore
Print_ISBN
1-4244-0664-1
Electronic_ISBN
1-4244-0665-X
Type
conf
DOI
10.1109/EPTC.2006.342737
Filename
4147266
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