Title :
A 7-bit 26-MS/s SAR ADC in 0.18 μm CMOS process for WSN application
Author :
Ting Yang ; Zhiqun Li
Author_Institution :
Inst. of RF - & OE-ICs, Southeast Univ., Nanjing, China
Abstract :
A 7-bit 26MS/s SAR (successive approximation register) ADC is presented in this paper for the application of ZigBee receiver. Compared to the conventional method, the set-and-down method reduces the average switching energy by around 80%. Dynamic comparator is chosen to diminish the signal-dependent offset caused by the non-fixed input common-mode voltage. A prototype ADC was implemented in a CMOS 0.18-μm technology. The ADC consumes 1.66 mW at 26MS/s under a 1.8-V supply. The post-simulation shows that SNDR and SFDR are 43.11dB and 57.49dB, when sampling 3.19921875 MHz sinusoid input signal at 26MHz sampling clock.
Keywords :
CMOS integrated circuits; Zigbee; analogue-digital conversion; approximation theory; radio receivers; wireless sensor networks; CMOS process; SAR ADC; SFDR; SNDR; WSN application; Zigbee receiver; average switching energy reduction; bit rate 26 Mbit/s; dynamic comparator; frequency 26 MHz; frequency 3.19921875 MHz; nonfixed input common-mode voltage; power 1.66 mW; set-and-down method; size 0.18 mum; successive approximation register ADC; voltage 1.8 V; word length 7 bit; Arrays; CMOS integrated circuits; Capacitors; Pipelines; Power demand; Switches; Wireless sensor networks;
Conference_Titel :
High Speed Intelligent Communication Forum (HSIC), 2012 4th International
Conference_Location :
Nanjing, Jiangsu
Print_ISBN :
978-1-4673-0678-2
Electronic_ISBN :
978-1-4673-0676-8
DOI :
10.1109/HSIC.2012.6213020
