DocumentCode :
2278940
Title :
A new SP (simultaneous polishing) model for copper CMP process
Author :
Ohta, T. ; Suzuki, K.
Author_Institution :
Semicond. Leading Edge Technol. Inc., Yokohama, Japan
fYear :
2002
fDate :
2002
Firstpage :
257
Lastpage :
260
Abstract :
For the copper damascene process, dummy fill is used to improve over-polishing problems such as dishing and erosion. Dummy placement based on design rules is ordinary used, but to improve the efficiency of the dummy fill, model-based design is necessary So, we have developed a new SP (simultaneous, polishing) model for Cu-CMP and developed a dummy pattern design system to utilize the model. Using the model, simulation results of dishing and erosion well agree with experiments within 10% errors, and calculation time is fast enough for LSI design. The system we develop can be utilized to design dummy placement practically.
Keywords :
chemical mechanical polishing; copper; integrated circuit technology; semiconductor process modelling; Cu; LSI design; copper damascene process; dishing; dummy fill; dummy pattern design; erosion; model-based design; over-polishing problems; simultaneous polishing; Accuracy; Convolution; Copper; Electronic design automation and methodology; Electronic mail; Equations; Frequency; Stress; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 2002. SISPAD 2002. International Conference on
Print_ISBN :
4-89114-027-5
Type :
conf
DOI :
10.1109/SISPAD.2002.1034567
Filename :
1034567
Link To Document :
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