Simulation of at-speed tests for stuck-at faults

We examine the detectability of stuck-at faults when test vectors are applied at the rated speed. In the presence of path delays that are comparable to the clock interval, delayed signal transitions or timing hazards influence the detection of faults. It is, therefore, possible that a stuck-at fault that is detected by a test applied at slow speed, may not be detected with high speed test application. We present a fault simulation method that takes timing effects into account without specific delay modeling. Delay-hazard robust (dh-robust) coverage of a test sequence is defined as the coverage of single stuck-at faults that are guaranteed to be detected irrespective of delays or hazards. For tests generated for slow-speed testing, the dh-robust coverage can be quite low. However, special timing considerations in test generation provide better quality tests, especially for high performance circuits