DocumentCode :
2279100
Title :
Improving the efficiency of error identification via signature analysis
Author :
Stroud, Charles E. ; Damarla, T. Raju
Author_Institution :
Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USA
fYear :
1995
fDate :
30 Apr-3 May 1995
Firstpage :
244
Lastpage :
249
Abstract :
Efficient identification of all single bit errors in the input polynomial to signature analysis registers is achieved by using characteristic polynomial f(x)=fa(x)fb(x) where f a(x) and fb(x) have different degrees and are of the form fn(x)=xn+xn-1+1. The input polynomial must be of degree <lcm(ord(fa(x)), ord(fb (x))), where lcm denotes the least common multiple. Diagnostic aliasing for multiple bit errors is reduced by using non-primitive polynomials for fa(x) and/or fb(x)
Keywords :
VLSI; built-in self test; fault diagnosis; integrated circuit testing; logic testing; BIST; VLSI; characteristic polynomial; diagnostic aliasing; error identification; input polynomial; least common multiple; multiple bit errors; nonprimitive polynomials; signature analysis; single bit errors; Built-in self-test; Circuit faults; Circuit testing; Clocks; Electrical fault detection; Fault diagnosis; Hardware; Polynomials; Registers; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1995. Proceedings., 13th IEEE
Conference_Location :
Princeton, NJ
ISSN :
1093-0167
Print_ISBN :
0-8186-7000-2
Type :
conf
DOI :
10.1109/VTEST.1995.512644
Filename :
512644
Link To Document :
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