DocumentCode
2279689
Title
Tilt angle effect on optimizing HALO PMOS performance
Author
Jiong-Guang Su ; Shyh-Chyi Wong ; Chi-Tsung Huang ; Chang-Ching Cheng ; Chih-Chiang Wang ; Shiang Huang-Lu ; Bing-Yui Tsui
Author_Institution
Dept. of Electron., Fengchia Univ., Taichung, Taiwan
fYear
1997
fDate
8-10 Sept. 1997
Firstpage
33
Lastpage
36
Abstract
Deep submicrometer MOS devices often need special structures to optimize their performance. The HALO structure, or pocket implant, is usually adopted for PMOS to reduce off-state leakage current and enhance on-state drive current. This paper studies the tilt angle effect of HALO implant on device performance. It is found that devices with higher tilt angle feature reduced body effect and increased source resistance as compared to those with low tilt angle, and the effect of resistance and body effect compensates each other, resulting equivalent DC performance for different tilt angles. We suggest that based on this equivalence of DC performance, a high tilt angle should be adopted for HALO devices due to their lower junction capacitance.
Keywords
CMOS integrated circuits; MOSFET; capacitance; ion implantation; leakage currents; HALO PMOS performance; body effect; deep submicrometer MOS devices; junction capacitance; offstate leakage current; onstate drive current; pocket implant; source resistance; tilt angle effect; Calibration; Capacitance; Degradation; Electronics industry; Immune system; Implants; Industrial electronics; Leakage current; MOS devices; Medical simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices, 1997. SISPAD '97., 1997 International Conference on
Conference_Location
Cambridge, MA, USA
Print_ISBN
0-7803-3775-1
Type
conf
DOI
10.1109/SISPAD.1997.621329
Filename
621329
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