Ultra thinning of wafer for embedded module

As the trend in semiconductor is going for ultra thin wafers and die, the process and fabrication steps are no longer simple and conventional. Main drivers for ultra thin semiconductor devices are embedded packages, power electronics and flexible electronics (Smart card). High-integration of microelectronics (e.g. 3-D integration) requires thin device to shorten interconnect lines. Thinning seven percent of the original thickness reduces 60% of the die breaking strength. The die strength is only 7-8% of the original thickness, if it is thinned to ~ 200 microns. Therefore thinning parameters and backside treatment is most important for the ultra thin die reliability. In this paper wafer thinning parameters and its effect on the die break load is reported. A comparison of stress relieving methods on the die strength is reported. The TTV control and surface roughness achieved by two types of stress relieving methods are investigated