Title :
Energy saving potential of low-temperature cooling of computers
Author :
Khalifa, H. Ezzat ; Erden, Hamza Salih ; de Rouge, Romain B.
Author_Institution :
Dept. of Mech. & Aerosp. Eng., Syracuse Univ., Syracuse, NY, USA
Abstract :
Current trends in data center cooling infrastructure design drive toward raising the coolant temperature to as high a level as equipment reliability allows in order to reduce the energy consumed by the cooling infrastructure and, consequently, improve (i.e., decrease) the power utilization effectiveness (PUE). However, as currently applied, PUE would appear to have deteriorated if measures are taken to reduce the energy consumption of the servers themselves. Because the temperature-dependent leakage power dissipation of modern deep-submicron computer chips constitutes a large fraction of the total power dissipation of these chips, the power consumption of such chips can be reduced by operating them at lower temperature. Not only does low-temperature operation reduce leakage power dissipation, but also it increases reliability and opens the potential for increasing the chip clock speed. However, these benefits may not lead to a reduction in the overall power consumption of the system of the servers and their associated cooling infrastructure if the leakage power reductions are more than offset by an increase in the power consumption of the low -temperature cooling infrastructure. In this paper we present a preliminary analytical study of a power and refrigeration cascade system (PARCS) that has the potential to realize the benefits of chip low-temperature operation while decreasing the overall power consumption of the servers and their cooling infrastructure. We describe a parametric conceptual model of the combined servers and PARCS as a function of the coolant temperature and show that the optimum coolant temperature of servers equipped with 45, 32 and 22 nm chips could be substantially lower than the 27°C recommended by ASHRAE.
Keywords :
computer centres; cooling; energy conservation; microprocessor chips; PARCS system; PUE; chip clock speed; coolant temperature; data center cooling infrastructure design; deep-submicron computer chips; energy consumption reduction; energy saving potential; equipment reliability; low-temperature cooling; power and refrigeration cascade system; power utilization effectiveness; size 22 nm; size 32 nm; size 45 nm; temperature 27 degC; temperature-dependent leakage power dissipation; Absorption; Coolants; Energy consumption; Power demand; Servers; Temperature distribution; leakage power; power and refrigeration cascade system; subzero cooling;
Conference_Titel :
Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), 2014 IEEE Intersociety Conference on
Conference_Location :
Orlando, FL
DOI :
10.1109/ITHERM.2014.6892406