DocumentCode :
2280592
Title :
Design verification of power electronics systems subject to bounded uncertain inputs
Author :
Hope, Eric M. ; Domínguez-García, Alejandro D.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
fYear :
2009
fDate :
20-24 Sept. 2009
Firstpage :
1126
Lastpage :
1132
Abstract :
A method for design verification of power electronics systems is proposed. In this method, the system is described by a linear switched state-space representation, where some or all of the inputs may vary without control over some bounded range, e.g., load current and input voltage. The method relies on solving the reachability problem associated with this system, which is the computation of the set of all possible trajectories that arise from different initial conditions, uncontrolled inputs, and inherent switching. The method allows one to verify whether or not this set (called the reach set) remains within a region of the state-space defined by performance requirements, e.g., output voltage tolerance. Algorithms to solve the reachability problem for power electronics converters with both open- and closed-loop control are provided. The application of the method is illustrated in buck and boost converter examples.
Keywords :
closed loop systems; open loop systems; power convertors; reachability analysis; state-space methods; voltage control; boost converter; buck converter; closed-loop control; design verification; linear switched state-space representation; open-loop control; power electronic converter; power electronics system; reachability problem; voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Energy Conversion Congress and Exposition, 2009. ECCE 2009. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2893-9
Electronic_ISBN :
978-1-4244-2893-9
Type :
conf
DOI :
10.1109/ECCE.2009.5316420
Filename :
5316420
Link To Document :
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