• DocumentCode
    2281252
  • Title

    Implementation of general CORDIC IP core based on FPGA

  • Author

    Juntao, Zhang ; Wenbo, Ma

  • Author_Institution
    Coll. of Electr. Eng., Shaanxi Univ. of Sci. & Technol., Xi´´an, China
  • Volume
    3
  • fYear
    2011
  • fDate
    10-12 June 2011
  • Firstpage
    606
  • Lastpage
    608
  • Abstract
    Principle of CORDIC algorithm is introduced, CORDIC IP core based on iteration architecture and pipeline architecture is implemented on FPGA which can compute trigonometry such as sine, cosine, sinh and cosh according to different initial value. Finally the performance of both IP core is compared in terms of area and speed.
  • Keywords
    digital arithmetic; field programmable gate arrays; FPGA; general CORDIC IP core; iteration architecture; pipeline architecture; trigonometry; CORDIC; FPGA; algorithm; coordinate conversion; implementation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Science and Automation Engineering (CSAE), 2011 IEEE International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-8727-1
  • Type

    conf

  • DOI
    10.1109/CSAE.2011.5952751
  • Filename
    5952751
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2281252