Flexible system interface ASIC for FDDI adapter

The author presents a flexible system interface (FlexSi) application specific IC (ASIC) architecture to address the system bus bandwidth utilization and bus latency issues in fiber distributed data interface (FDDI) adapter design. The proposed ASIC is intended to be used in conjunction with National´s FDDE chip set BSI-2 or MACSI. A learning model in the ASIC architecture understands the parameters associated with the data structures in the host memory by snooping the bus transactions on the BSI-2 device. Using the learned parameters, the ASIC implements a memory management scheme to provide transparent memory mapping between the host memory and the local frame buffer memory. The modularity and microcode control structure provide the flexibility to customize the ASIC to interface various system buses and achieve data structure transformations