• DocumentCode
    2282220
  • Title

    Statistical analysis driven synthesis of asynchronous systems

  • Author

    Ohashi, Koji ; Kaneko, Mineo

  • Author_Institution
    Sch. of Inf. Sci., Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
  • fYear
    2005
  • fDate
    2-5 Oct. 2005
  • Firstpage
    200
  • Lastpage
    205
  • Abstract
    In this paper, we propose an effective asynchronous datapath synthesis system to optimize statistical schedule length using statistical schedule length analysis. The proposed method is a heuristics which simultaneously performs scheduling and resource binding. During the design process, decisions are made based on the statistical schedule length analysis. It is demonstrated that asynchronous datapaths with the reduced mean total computation time are successfully synthesized for some datapath synthesis benchmarks.
  • Keywords
    asynchronous circuits; integrated circuit design; logic design; statistical analysis; asynchronous datapath synthesis system; asynchronous datapaths; resource binding; statistical analysis; statistical schedule length analysis; Circuit synthesis; Clocks; Control system synthesis; Crosstalk; Delay effects; Job shop scheduling; Processor scheduling; Space exploration; Statistical analysis; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 2005. ICCD 2005. Proceedings. 2005 IEEE International Conference on
  • Print_ISBN
    0-7695-2451-6
  • Type

    conf

  • DOI
    10.1109/ICCD.2005.100
  • Filename
    1524153