DocumentCode :
2282592
Title :
A waveform independent gate model for accurate timing analysis
Author :
Li, Peng ; Acar, Emrah
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
fYear :
2005
fDate :
2-5 Oct. 2005
Firstpage :
363
Lastpage :
365
Abstract :
In nanoscale regime, it is becoming increasingly difficult to model signal shapes using simple ramp-like waveforms due to various noise coupling effects. We present an accurate waveform independent gate (WiM) model without any assumption of signal waveforms. Our model can be applied to arbitrary gate inputs while maintaining excellent near-SPICE accuracy. The application of the proposed gate modeling technique is demonstrated under the context of the gate-level timing simulation.
Keywords :
logic gates; logic simulation; timing; waveform analysis; gate input; gate-level timing simulation; noise coupling effects; ramp-like waveforms; signal waveform; timing analysis; waveform independent gate model; Capacitance; Context modeling; Crosstalk; Delay effects; Integrated circuit interconnections; Propagation delay; SPICE; Table lookup; Timing; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 2005. ICCD 2005. Proceedings. 2005 IEEE International Conference on
Print_ISBN :
0-7695-2451-6
Type :
conf
DOI :
10.1109/ICCD.2005.17
Filename :
1524176
Link To Document :
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