A novel piezoresistive stress sensing method in flip chip technology

Author

Shen, Jie ; Song, Jing ; Tang, Jieying

Author_Institution

Key Lab. of MEMS of Minist. of Educ., Southeast Univ., Nanjing, China

fYear

2010

fDate

16-19 Aug. 2010

Firstpage

675

Lastpage

678

Abstract

Stress in flip-chip (FC) packaging process will have a great effect on the performances and reliability of the packaged devices, especially the mechanical parts. Flip chips with various bump-area-arrays have diverse stress distributions due to temperature loads. Since the top surface of the chip is not exposed to optical observation, the traditional full-field optical measurement techniques are not suitable for the quality characterization of FC. In this paper, Finite Element Model (FEM) is established for flip chips with 3×3, 6×6, 9×9 bump-area-arrays respectively. In addition, a new sensing method based on piezoresistive sensing and stress isolation is presented to improve the accuracy of the quality characterization. Finally, a manufacturing process of the novel piezoresistive stress sensor is designed.

Keywords

finite element analysis; flip-chip devices; piezoresistive devices; semiconductor device reliability; stress analysis; bump-area-arrays; finite element model; flip chip technology; flip-chip packaging process; full-field optical measurement techniques; manufacturing process; mechanical parts; packaged device reliability; piezoresistive stress sensing method; piezoresistive stress sensor; quality characterization; stress distributions; stress isolation; temperature loads; Finite element methods; Flip chip; Micromechanical devices; Packaging; Piezoresistance; Sensors; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), 2010 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4244-8140-8

Type

conf

DOI

10.1109/ICEPT.2010.5582870

Filename

5582870