Author :
Shim, Keon-Soo ; Choi, Eun-Seok ; Jung, Sung-Wook ; Kim, Se-Hoon ; Yoo, Hyun-Seung ; Jeon, Kwang-Sun ; Joo, Han-Soo ; Oh, Jung-Seok ; Jang, Yoon-Soo ; Park, Kyung-Jin ; Choi, Sang-Moo ; Lee, Sang-Bum ; Koh, Jeong-Deog ; Lee, Ki-Hong ; Lee, Ju-Yeab ; Oh, S
Author_Institution :
R&D Div, Hynix Semicond. Inc., Icheon, South Korea
Abstract :
Program disturbance characteristics of 3D vertical NAND Flash cell array architecture have been investigated intensively. A new ´program Y disturbance´ mode peculiar to 3D NAND Flash cell is defined. Swing characteristics of poly-Si channel and increased NOP (number of program) stress have been compared with 2D planar NAND Flash cell. In this paper, new program method pertinent to 3D NAND Flash memory was proposed to obtain program disturbance characteristics for MLC.
Keywords :
NAND circuits; flash memories; 2D planar NAND flash cell; 3D vertical NAND flash cell array architecture; MLC; NOP stress; number of program stress; program Y disturbance; program disturbance; program disturbance characteristics; Arrays; DSL; Flash memory; Microprocessors; Three dimensional displays; Transistors;
