DocumentCode
2283167
Title
Simulation of advanced-LOCOS capability for sub-0.25 micron CMOS isolation
Author
Jones, S.K. ; Bazley, D.J. ; Beanland, R. ; Badenes, G. ; Scaife, B.
Author_Institution
GEC Marconi Mater. Technol. Ltd., Towcester, UK
fYear
1997
fDate
8-10 Sept. 1997
Firstpage
185
Lastpage
188
Abstract
The visco-elastic oxidation model has been calibrated on 0.35 and 0.25 /spl mu/m CMOS LOCOS-type isolation structures. Simulation is used to assess the capability of advanced LOCOS options for sub-0.25 micron CMOS. At reduced active area pitch the active-area lifting phenomenon restricts the thickness of field oxide which may be grown. Predictions of the maximum field oxide and active area encroachment are made for an active area pitch of 0.6 /spl mu/m.
Keywords
CMOS integrated circuits; isolation technology; semiconductor process modelling; 0.25 micron; LOCOS-type isolation structures; active area encroachment; active-area lifting phenomenon; advanced LOCOS capability; maximum field oxide prediction; simulation; submicron CMOS isolation; visco-elastic oxidation model; Calibration; Compressive stress; Materials science and technology; Oxidation; Semiconductor device modeling; Shape measurement; Silicon; Space technology; Temperature measurement; Viscosity;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices, 1997. SISPAD '97., 1997 International Conference on
Conference_Location
Cambridge, MA, USA
Print_ISBN
0-7803-3775-1
Type
conf
DOI
10.1109/SISPAD.1997.621368
Filename
621368
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