DocumentCode :
2283181
Title :
High temperature testing of SOI devices to 400°C
Author :
Grzybowski, Richard R. ; Tyson, Scott M.
Author_Institution :
United Technologies Res. Center, East Hartford, CT, USA
fYear :
1993
fDate :
5-7 Oct 1993
Firstpage :
176
Lastpage :
177
Abstract :
Digital circuitry that would perform reliably in adverse high temperature environments is needed in applications that include under-the-hood and anti-lock braking automotive functions as well as distributed jet engine control applications. Careful circuit design practices coupled with a good understanding of how these devices perform at, elevated temperatures would allow the development of these circuit functions for reliable, long term operation in these environments. This paper describes the high temperature (to 400°C) testing and characterization of a number of parametric test structures fabricated using United Technologies Microelectronics Center´s Digital CMOS SOI (DCS) process. This technology was designed for high performance, low power, high temperature, and radiation hardened applications at conventional and reduced power supply voltage levels
Keywords :
high-temperature techniques; semiconductor device testing; semiconductor-insulator boundaries; silicon; 400 C; SOI devices; anti-lock braking; digital CMOS SOI process; digital circuitry; distributed jet engine control; high temperature testing; low power; parametric test structures; radiation hardened applications; reliable long term operation; under-the-hood automotive functions; Automotive engineering; CMOS process; CMOS technology; Circuit synthesis; Circuit testing; Coupling circuits; Distributed control; Jet engines; Microelectronics; Temperature control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, 1993. Proceedings., 1993 IEEE International
Conference_Location :
Palm Springs, CA
Print_ISBN :
0-7803-1346-1
Type :
conf
DOI :
10.1109/SOI.1993.344547
Filename :
344547
Link To Document :
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