DocumentCode
2283203
Title
Petascale Computing Research Challenges - A Manycore Perspective
Author
Pawlowski, Steve
Author_Institution
Digital Enterprise Group, Intel Corp., Santa Clara, CA
fYear
2007
fDate
10-14 Feb. 2007
Firstpage
96
Lastpage
96
Abstract
Summary form only given. Future high performance computing will undoubtedly reach Petascale and beyond. Today´s HPC is tomorrow´s personal computing. What are the evolving processor architectures towards multi-core and many-core for the best performance per watt; memory bandwidth solutions to feed the ever more powerful processors; intra-chip interconnect options for optimal bandwidth vs. power? With Moore´s Law continuing to prove its viability and shrinking transistors´ geometry, improving reliability is even more challenging. Intel Senior Fellow and Chief Technology Officer of Intel´s Digital Enterprise Group, Steve Pawlowski, will provide his technology vision, insight and research challenges to achieve the vision of Petascale computing and beyond
Keywords
multiprocessing systems; parallel architectures; Petascale computing; high performance computing; manycore processor; memory bandwidth; multicore processor; personal computing; processor architecture; Bandwidth; Computer architecture; Feeds; Geometry; High performance computing; Microprocessors; Moore´s Law; Petascale computing; Technology management; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computer Architecture, 2007. HPCA 2007. IEEE 13th International Symposium on
Conference_Location
Scottsdale, AZ
Print_ISBN
1-4244-0805-9
Electronic_ISBN
1-4244-0805-9
Type
conf
DOI
10.1109/HPCA.2007.346188
Filename
4147651
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