• DocumentCode
    2283416
  • Title

    Power-efficient wakeup tag broadcast

  • Author

    Sharkey, Joseph J. ; Ghose, Kanad ; Ponomarev, Dmitry V. ; Ergin, Oguz

  • Author_Institution
    Dept. of Comput. Sci., New York State Univ., Binghamton, NY, USA
  • fYear
    2005
  • fDate
    2-5 Oct. 2005
  • Firstpage
    654
  • Lastpage
    661
  • Abstract
    The dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay and energy requirement of driving the wakeup tags across the associatively-addressed issue queue accounts for a significant percentage of the scheduler´s overhead and also limits the design scalability. We propose tag memoization and tagline folding - two schemes to reduce the power of wakeup tag broadcasts by reducing the number of tag-bits that are driven in each broadcast. Our results show that the combination of these mechanisms provides 223% average reduction of the wakeup tag broadcast power with no impact on the IPC.
  • Keywords
    delays; instruction sets; logic partitioning; microprocessor chips; parallel architectures; power consumption; processor scheduling; associatively-addressed issue queue; delay; dynamic instruction scheduling logic; power dissipation; superscalar microprocessors; tag memoization; tagline folding; wakeup tag broadcast; Broadcasting; Capacitance; Circuit simulation; Delay; Dynamic scheduling; Energy dissipation; Logic; Processor scheduling; Registers; Technical Activities Guide -TAG;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 2005. ICCD 2005. Proceedings. 2005 IEEE International Conference on
  • Print_ISBN
    0-7695-2451-6
  • Type

    conf

  • DOI
    10.1109/ICCD.2005.85
  • Filename
    1524221