Title :
ACUTE: a high performance analog complementary polysilicon emitter bipolar technology utilizing SOI/trench full dielectric isolation
Author :
Jerome, R.C. ; Post, I R C ; Travnicek, P.G. ; Wodek, G.M. ; Huffstater, K.E. ; Williams, D.R.
Author_Institution :
United Technologies Microelectronics Centre, Colorado Springs, CO, USA
Abstract :
The advantages of using full dielectric isolation, in the form of SOI substrates and trench isolation, are well known, namely the reduction of substrate parasitic currents due to high voltage, high temperature or harsh radiation environments. Moreover, high voltage analog bipolar transistors can also benefit from full dielectric isolation in terms of limiting substrate capacitance and providing the means to achieve well matched, densely packed transistors. A high voltage analog SOI/trench dielectrically isolated complementary bipolar technology is described, which achieves well matched, leakage-free high-speed transistor performance
Keywords :
bipolar integrated circuits; integrated circuit technology; linear integrated circuits; power integrated circuits; semiconductor-insulator boundaries; silicon; ACUTE; SOI/trench full dielectric isolation; Si; analog complementary process; high voltage bipolar technology; leakage-free high-speed transistor performance; polysilicon emitter bipolar technology; substrate capacitance limitation; Bipolar transistors; Cutoff frequency; Dielectric substrates; Doping profiles; Isolation technology; Microelectronics; Springs; Temperature; Thermal stresses; Voltage;
Conference_Titel :
SOI Conference, 1993. Proceedings., 1993 IEEE International
Conference_Location :
Palm Springs, CA
Print_ISBN :
0-7803-1346-1
DOI :
10.1109/SOI.1993.344573