Modeling of a pair of annular through silicon vias (TSV)

Author

Xiao-Long Xu ; Wen-Sheng Zhao ; Wen-Yan Yin

Author_Institution

Centre for Microwave & RF Technol., Shanghai Jiao Tong Univ., Shanghai, China

fYear

2011

fDate

12-14 Dec. 2011

Firstpage

1

Lastpage

4

Abstract

Modelling of a pair of annular TSVs is performed in this paper. A set of equivalent lumped-element circuit models for two annular TSV interconnects is proposed, with MOS capacitance effects treated appropriately. The method for characterizing its frequency- and temperature-dependent RLCG parameters is proposed, including its effective capacitance and conductance. The characteristic impedance and insertion loss are studied numerically.

Keywords

MOS integrated circuits; capacitance; electric admittance; electric impedance; equivalent circuits; integrated circuit interconnections; integrated circuit modelling; three-dimensional integrated circuits; MOS capacitance; annular TSV interconnects; annular through silicon vias modelling; conductance; equivalent lumped-element circuit model; frequency-dependent RLCG parameter; impedance; insertion loss; temperature-dependent RLCG parameter; Capacitance; Impedance; Inductance; Integrated circuit modeling; Resistance; Silicon; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2011 IEEE

Conference_Location

Hanzhou

ISSN

2151-1225

Print_ISBN

978-1-4673-2288-1

Electronic_ISBN

2151-1225

Type

conf

DOI

10.1109/EDAPS.2011.6213740

Filename

6213740